Print ISSN: 1681-6900

Online ISSN: 2412-0758

Keywords : Field Programmable Gate Array


FPGA-Based Single-Phase PV Inverter Using Unipolar and Bipolar SPWM Control Techniques

Murtadha R. Sadeq; Hanan A. R. Akkar

Engineering and Technology Journal, 2022, Volume 40, Issue 2, Pages 386-395
DOI: 10.30684/etj.v40i2.2239

The study presents circuitry modeling and methodology to integrate solar photovoltaic (PV) energy with grid (AC) sources to supplement household appliances during a power cut-off or restricted supply period and alternating charge deep cycle batteries. This paper discusses an FPGA-based Sinusoidal Pulse Width Modulation (SPWM) generator as a control mechanism for a PV/Battery full-bridge inverter. The inverter's efficacy is expressed as the Total Harmonic Distortion (THD) ratio, which must be as low as possible. Various schemes are proposed to reduce THD to generate a more sinusoidal output wave. SPWM is mostly used in industrial inverters. Two SPWM techniques, Bipolar and unipolar, are compared under a variety of Modulation Index (MI) conditions and Carrier Frequency (fc) to analyze the best performance of the full-bridge inverter with less (THD) and smoother output sinewave. The present paper discusses the results of a simulation for a single-phase full-bridge inverter employing bipolar and unipolar SPWM techniques. The output waveform demonstrates that the Unipolar SPWM technique produces less Total harmonic Distortion than the Bipolar method, with THD 45% lower. ISE 14.7 and Matlab 2019 are used to present, simulate SPWM generating code, and implement the design on a field-programmable gate array (FPGA), which acts as a controller for the Mosfet gates in the full-bridge inverter to constitute a sine wave without changing any hardware configuration in the circuit design. The system implementation of SPWM Pulse generation has been validated on Xilinx Spartan 6 FPGA (XC6SLX45) board using VHDL code. The final test on the system design for the SPWM generation program, after synthesis and compilation were finalized and verified on a prototype system.

Design of Intelligent Controller for Solar Tracking System Based on FPGA

Hanan A. R. Akkar; Yaser M. Abid

Engineering and Technology Journal, 2015, Volume 33, Issue 1, Pages 114-128

The needs for increasing the power generation make the use of solar cells plays an important role in the daily life. For this reason, it is important to use solar tracking system to increase or getting almost optimum amount from solar cells. In this paper, proposed intelligent controllers were designed and used to make solar cells facing the sun over the year. The proposed controller was trained by two ways; the first was trained by supervised feed forward neural network and the second by Particle Swarm Optimization (PSO) the results obtained for both designs are then compared. The controller was trained using MATLAB and then converted to SIMULINK model in order to test it, and convert it to a Very high speed integrated circuit Hardware Description Language (VHDL) language using MATLAB tool box in order to download it on Spartan 3A Field Programmable Gate Arrays (FPGAs) card. This makes the implementation of the intelligent controller more efficient and easy to use because of its reprogram-ability and the high speed performance. The controller was designed to a fully controlled DC motor driver which is used to rotate two DC motors in X-axis and Y-axis directions respectively.
The experimental results show that tracking sun increases the efficiency of the system to produce energy from solar cell about 44.3778 % more energy than the solar cell without tracking system.

Training Artificial Neural Networks by PSO to Perform Digital Circuits Using Xilinx FPGA

Hanan A. R. Akkar; Firas R. Mahdi

Engineering and Technology Journal, 2011, Volume 29, Issue 7, Pages 1329-1344

One of the major constraints on hardware implementations of Artificial Neural
Networks (ANNs) is the amount of circuitry required to perform the multiplication
process of each input by its corresponding weight and there subsequent addition. Field
Programmable Gate Array (FPGA) is a suitable hardware IC for Neural Network (NN)
implementation as it preserves the parallel architecture of the neurons in a layer and
offers flexibility in reconfiguration and cost issues. In this paper the adaption of the
ANN weights is proposed using Particle Swarm Optimization (PSO) as a mechanism
to improve the performance of ANN and also for the reduction in the ANN hardware.
For this purpose we modified the MATLAB PSO toolbox to be suitable for the taken
application. In the proposed design training is done off chip then the fully trained
design is download into the chip, in this way less circuitry is required. This paper
executes four bit Arithmetic Logic Unit (ALU) implemented using Xilinx schematic
design entry tools as an example for the implementation of digital circuits using ANN
trained by PSO algorithm.