Implementation of Hyperbolic Sine and Cosine Functions Based on FPGA using different Approaches
Implementation of Hyperbolic Sine and Cosine Functions Based on FPGA using different Approaches

Rawasee k. yousif; Ivan A. Hashim; Bassam H. Abd

Volume 41, Issue 8 , August 2023, , Page 1091-1106

https://doi.org/10.30684/etj.2023.139756.1440

Abstract
  This paper presents the implementations of the hyperbolic sine and cosine functions, which are essential in many digital systems. In the previous eras, these functions were only implemented ...  Read More ...
FPGA Implementation of Modified Reconfigurable Adaptive Gain Scheduling Controller
FPGA Implementation of Modified Reconfigurable Adaptive Gain Scheduling Controller

Ali Wheed; Abbas H. Issa; Mohammed Y. Y.

Volume 39, Issue 7 , July 2021, , Page 1105-1116

https://doi.org/10.30684/etj.v39i7.1772

Abstract
  This article aims to put forward a modified type of adaptive gain scheduling that will be able to deal with the immeasurable and unpredictable variations of system variables by adapting ...  Read More ...
Study of Power System Load Flow Using FPGA and LabVIEW
Study of Power System Load Flow Using FPGA and LabVIEW

Ahmed Y. Yaseen; Afaneen A. Abbood

Volume 38, 5A , May 2020, , Page 690-697

https://doi.org/10.30684/etj.v38i5A.346

Abstract
  The capability to rapidly execute the power flow (PF) calculations permit engineers in assured with stay bigger assured within the dependability, protection, and economical operation ...  Read More ...
High Rate Data Processing System of 6x6 MIMO_OFDM Using FPGA Technique with Spatial Algorithm
High Rate Data Processing System of 6x6 MIMO_OFDM Using FPGA Technique with Spatial Algorithm

Muthna J. Fadhil

Volume 36, 7A , July 2018, , Page 723-732

https://doi.org/10.30684/etj.36.7A.4

Abstract
  OFDM has high spectral Performance and pliability in multipath channel effects while MIMO use another strategy for saving power of transmitter by using multi in multi out antennas to ...  Read More ...
Intelligent Monitoring for DC Motor Performance Based on FPGA
Intelligent Monitoring for DC Motor Performance Based on FPGA

Abbas H. Issa; Bilal Z. Ahmed

Volume 34, 13A , December 2016, , Page 2490-2499

https://doi.org/10.30684/etj.34.13A.11

Abstract
  This paper presents a fault monitoring of DC motors. A neural network is prepared to processes the inputs parameters “motor speed and current” collected from sensors and ...  Read More ...
FPGA Design and Implementation of Data Covering Based on MD5 Algorithm
FPGA Design and Implementation of Data Covering Based on MD5 Algorithm

Thamir R. Saeed

Volume 34, 14A , December 2016, , Page 2621-2630

https://doi.org/10.30684/etj.34.14A.7

Abstract
  The protection of information leads to protection of individual privacy for everyone. This protection is performed using encryption. Many types of encryption may be utilized while the ...  Read More ...
High Level Implementation Methodologies of DSP Module using FPGA and System Generator
High Level Implementation Methodologies of DSP Module using FPGA and System Generator

Majid S. Naghmash; Mousa K. Wali; Amar A. Abdulmajeed

Volume 34, 2A , February 2016, , Page 295-306

https://doi.org/10.30684/etj.34.2A.9

Abstract
  This paper presents the high level implementation methodologies of Digital Signal Processing (DSP) module by using the Field Programmable Gate Array (FPGA) andintegrated software environments ...  Read More ...
Design and Implementation of Programmable Multi-Mode Digital Modulator for SDR Using FPGA
Design and Implementation of Programmable Multi-Mode Digital Modulator for SDR Using FPGA

Majid S. Naghmash

Volume 32, Issue 7 , August 2014, , Page 1655-1670

https://doi.org/10.30684/etj.32.7A.4

Abstract
  The design of programmable multi-mode digital modulator for software defined radio (SDR) technology using FPGA is developed and investigated in this paper. The system generator from ...  Read More ...
Design and Implementation of Discrete Multitone Modulator for Digital Subscriber Line Using FPGA
Design and Implementation of Discrete Multitone Modulator for Digital Subscriber Line Using FPGA

Hadi T. Ziboon; Ikhlas M. Farhan

Volume 32, Issue 7 , August 2014, , Page 1797-1810

https://doi.org/10.30684/etj.32.7A14

Abstract
  This paper presents a design, simulation and implementation of the Discrete Multitone (DMT) modulator for digital subscriber line (DSL) for both complex and real transmission based ...  Read More ...
Low Complexity Spectrum Sensing System for GFDM Cognitive Radio Signals
Low Complexity Spectrum Sensing System for GFDM Cognitive Radio Signals

Hussain K. Chaiel

Volume 32, Issue 6 , July 2014, , Page 1506-1518

https://doi.org/10.30684/etj.32.6A.13

Abstract
  Cognitive radio is a promising technology that aims to use the transmission spectrum efficiently. Each cognitive transmission process consists typically of two phases. During the first ...  Read More ...
Design and Implementation of MC-CDMA Technique Using FPGA
Design and Implementation of MC-CDMA Technique Using FPGA

il A. H. Hadi; Layla Hattim Abood

Volume 31, Issue 11 , July 2013, , Page 2085-2097

https://doi.org/10.30684/etj.31.11A6

Abstract
  Multicarrier Code Division Multiple Access (MC-CDMA) is attractive technique for high speed wireless data transmission; it's a combination of Orthogonal Frequency Division Multiplexing ...  Read More ...
Implementation of Golay Complementary Code Sequences Generator Based on FPGA
Implementation of Golay Complementary Code Sequences Generator Based on FPGA

Dhamyaa H. Mohammed

Volume 31, Issue 11 , July 2013, , Page 2157-2165

https://doi.org/10.30684/etj.31.11A11

Abstract
  Golay sequences have some properties make it distinctive in the applications and results. However, for this distinction must select the code sequences carefully and accurately. Therefore, ...  Read More ...
A VHDL Model for Implementation of MD5 Hash Algorithm
A VHDL Model for Implementation of MD5 Hash Algorithm

Mohammed A. Noaman

Volume 31, A 6 , June 2013, , Page 1107-1116

https://doi.org/10.30684/etj.31.6A7

Abstract
  With the increase of the amount of data and users in the information systems, the requirement of data integrity is needed to be improved as well, so the work has become necessary independently. ...  Read More ...
Digital Single Phase Power Factor Optimizer Based on FPGA
Digital Single Phase Power Factor Optimizer Based on FPGA

Jabber H.Majeed

Volume 30, Issue 19 , November 2012, , Page 3371-3383

https://doi.org/10.30684/etj.30.19.7

Abstract
  In this paper, an FPGA (Field-programmable gate array) model of digital single phase power factor optimizer has been built. The proposed optimizer is based on measuring the phase shift ...  Read More ...
Implementing of Forward Link Channel CDMA2000-1x System by Using Simulink HDL Coder
Implementing of Forward Link Channel CDMA2000-1x System by Using Simulink HDL Coder

Hadi T. Ziboon; Alaa Y. Eisa

Volume 30, Issue 14 , August 2012, , Page 2381-2400

https://doi.org/10.30684/etj.30.14.3

Abstract
  This work is a proposed simulation for forward link channel of CDMA2000 -1x system by using QPSK, 8QAM and 16QAM, and converting the proposed system to VHDL language by using Simulink ...  Read More ...
An FPGA Based Vehicles Density Dependent Intelligent Traffic Light System
An FPGA Based Vehicles Density Dependent Intelligent Traffic Light System

Najmah A. Habeeb

Volume 30, Issue 13 , July 2012, , Page 2186-2196

https://doi.org/10.30684/etj.30.13.3

Abstract
  In this paper, a vehicles density dependent intelligent traffic light system based on FPGA has been built. The intelligent traffic light system counts the number of available vehicles ...  Read More ...
Design Neural Wireless Sensor Network Using FPGA
Design Neural Wireless Sensor Network Using FPGA

Ban M. Khammas

Volume 30, Issue 9 , May 2012, , Page 1641-1661

https://doi.org/10.30684/etj.30.9.15

Abstract
  Wireless sensor networks(WSN) are an exiting emerging technology that scientists believe to become a part of every day life in the next few years. However, at this time many issues ...  Read More ...
Tx/Rx: Generation and Correlation of aCostas Array FM CodeUsing FPGA Spatran-3 Technology
Tx/Rx: Generation and Correlation of aCostas Array FM CodeUsing FPGA Spatran-3 Technology

Thamir R. Saeed

Volume 30, Issue 8 , April 2012, , Page 1394-1404

https://doi.org/10.30684/etj.30.8.10

Abstract
  This paper describes a real time generation and correlation of Costas array FM code pulse compression using Field Programmable Gate Array (FPGA) for implementation, which provides the ...  Read More ...
Design and Implementation of A Fpga Based Software Defined Radio Using Simulink HDL Coder
Design and Implementation of A Fpga Based Software Defined Radio Using Simulink HDL Coder

Hikmat N. Abdullah; Hussein A. Hadi

Volume 28, Issue 23 , November 2010, , Page 6750-6768

https://doi.org/10.30684/etj.28.23.12

Abstract
  This paper presents the design procedure and implementation results of aproposed software defined radio (SDR) using Altera Cyclone II family board. Theimplementation uses Matlab/SimulinkTM, ...  Read More ...