FPGA Design and Implementation of Data Covering Based on MD5 Algorithm
FPGA Design and Implementation of Data Covering Based on MD5 Algorithm

Thamir R. Saeed

Volume 34, 14A , December 2016, , Page 2621-2630

https://doi.org/10.30684/etj.34.14A.7

Abstract
  The protection of information leads to protection of individual privacy for everyone. This protection is performed using encryption. Many types of encryption may be utilized while the ...  Read More ...
Implementing of Forward Link Channel CDMA2000-1x System by Using Simulink HDL Coder
Implementing of Forward Link Channel CDMA2000-1x System by Using Simulink HDL Coder

Hadi T. Ziboon; Alaa Y. Eisa

Volume 30, Issue 14 , August 2012, , Page 2381-2400

https://doi.org/10.30684/etj.30.14.3

Abstract
  This work is a proposed simulation for forward link channel of CDMA2000 -1x system by using QPSK, 8QAM and 16QAM, and converting the proposed system to VHDL language by using Simulink ...  Read More ...
An FPGA Based Vehicles Density Dependent Intelligent Traffic Light System
An FPGA Based Vehicles Density Dependent Intelligent Traffic Light System

Najmah A. Habeeb

Volume 30, Issue 13 , July 2012, , Page 2186-2196

https://doi.org/10.30684/etj.30.13.3

Abstract
  In this paper, a vehicles density dependent intelligent traffic light system based on FPGA has been built. The intelligent traffic light system counts the number of available vehicles ...  Read More ...
FPGA Simulation of Type-3 Feistel Network of The 128 bits Block Size Improved Blowfish Cryptographic Encryption
FPGA Simulation of Type-3 Feistel Network of The 128 bits Block Size Improved Blowfish Cryptographic Encryption

Ashwaq Talib Hashim; Yousra A. Mohammed; Ekhlas H. Karam

Volume 28, Issue 9 , April 2010, , Page 1707-1718

https://doi.org/10.30684/etj.28.9.1

Abstract
  Reprogrammable devices such as Field Programmable Gate Arrays (FPGAs)are highly attractive options for hardware implementations of encryption algorithmsas they provide cryptographic ...  Read More ...
Design of Hierarchical Architecture of Multilevel Discrete Wavelet Transform Using VHDL Language
Design of Hierarchical Architecture of Multilevel Discrete Wavelet Transform Using VHDL Language

Waleed Fawwaz Shareef

Volume 28, Issue 7 , March 2010, , Page 1350-1360

https://doi.org/10.30684/etj.28.7.7

Abstract
  The wide spread of devices that use image processing in itsfunctions, like cellular phone and digital cameras, increases the need forspecialized processors for these functions as a ...  Read More ...
Represent Different Types of Sliding Mode Controllers by VHDL
Represent Different Types of Sliding Mode Controllers by VHDL

Yousra Abd Mohammed; Ekhlas H. Karam; Mohammed H. Khudair

Volume 27, Issue 12 , September 2009, , Page 2494-2516

https://doi.org/10.30684/etj.27.12.18

Abstract
  This paper focus on represent and implementation the conventional sliding mode control (SMC), in addition to some types of the common enhancement SMC approaches using reconfigurable ...  Read More ...
Design and Implementation of Synthesizable VHDL Model for General PCMCIA I/O Cards Controller
Design and Implementation of Synthesizable VHDL Model for General PCMCIA I/O Cards Controller

Yousra Abd Mohammed

Volume 26, Issue 7 , July 2008, , Page 762-776

https://doi.org/10.30684/etj.26.7.4

Abstract
  AbstractThe portable and nomadic computer market has driven the development ofPCMCIA Cards to address the expansion needs for the user. These cards provide avast variety of hardware ...  Read More ...
Implementing Fuzzy Logic Controller Using VHDL
Implementing Fuzzy Logic Controller Using VHDL

Yousra A. Mohammed; Leena K. Hashim

Volume 25, Issue 9 , November 2007, , Page 1049-1055

https://doi.org/10.30684/etj.25.9.3

Abstract
  Design of a Fuzzy Logic Controller (FLC) requires more design decisions thanusual, for example rule base, inference engine, defuzzifiction, and data pre- andpost processing.This paper ...  Read More ...