1 Ph.D. Student, Dept. of Electrical Engineering, University of Technology,

2 Assist. Prof., Dept. of Electrical Engineering, University of Technology,

3 Professor, Dept. of Electrical Engineering, University of Technology,


The design of high efficiency inverse class-F (class-F-1) radio frequency (RF) power amplifiers includes extensive measurements to characterize the RF power device by means of the empirical load-pull test setup. This paper presents an alternative characterization approach based on evaluating the load impedances analytically at the desired harmonic frequencies for a high electron mobility transistor (HEMT) in terms of the internal and package elements of the active device. It additionally provides a method for extracting the parasitic elements of the power device as well as determining the optimum load-line resistance using the transistor manufacturer’s large signal model. A new topology for the output matching circuit is also proposed with its synthetic procedure to present the appropriate harmonic load impedances. To verify this methodology, a 900 MHz inverse class-F power amplifier circuit was designed and its performance was tested with the aid of the Keysight ADS software. The simulation results showed an output power of 38 dBm, a power gain of about 13 dB, DC-to-RF efficiency greater than 87%, and an acceptable level of linearity for both GSM and CDMA modulated signals.