Optimum Design of Single-Phase Cascade Multilevel Inverter Using OHESW Technique

The traditional two or three levels inverter does not completely eliminate the unwanted harmonics in the output waveform. Therefore, using the multilevel inverter as an alternative to traditional PWM inverters is investigated. This paper describes the Optimized Harmonic Elimination Stepped Waveform OHESW technique to improve the output waveform quality of multilevel inverter fed induction motor. A new method is presented where switching angles are computed such that a desired fundamental sinusoidal voltage is produced while at the same time certain higher order harmonics are eliminated. The proposed method also is used to minimize the Total Harmonic Distortion THD of the synthesized multilevel waveform. The THD is investigated over a wide range of possible output control voltages and number of voltage levels used to synthesize the output waveform. Simulation results of a cascade multilevel inverter under OHESW technique with 5-up to 15-levels are used to eliminate the (3 rd -13 th ) harmonics. A prototype single-phase cascade 7-level inverter loaded by single-phase induction motor is investigated.


I. Introduction:
The poor quality of current and voltage fed by a classical two or three levels inverter has been pointed out in previous works [1,2].This disadvantage leads to the use of multilevel inverters in the drives community, for high power adjustable speed systems.
Multilevel inverters synthesize the AC voltage from several different levels of DC voltages.Each additional DC voltage level adds a step to the AC voltage waveform.These DC voltages may or may not be equal to one another [3].From a technological point of view, appropriate DC voltage levels can be reached, allowing use of multilevel power inverter for the medium voltage for adjustable speed drives ASD [4].Multilevel inverters can reach high voltage and reduce harmonics by their own structures without transformers [5].The AC voltage waveform resulting produced from these DC voltages is approximately sinusoidal.By switching the DC voltages to the AC output, a staircase (stepped) waveform can be produced which approaches the sinusoidal waveform with minimum THD.
Traditional PWM methods employ switching frequencies on the order of several kHz, while Multilevel Fundamental Switching (MFS) scheme employs 50Hz.Therefore, this scheme will lead to minimum switching conduction losses comparable to typical PWM schemes.However, switching losses increase as the switching frequency increases.As a result, it is desirable to make the switching frequency as low as possible [6].Traditional PWM inverters also have recently been found to be a major cause of motor bearing failures due to excessive bearing currents in invertermotor drive systems [7].
One of the significant advantages of multilevel configuration is the harmonic reduction in the output waveform without increasing switching frequency or decreasing the inverter power output.
The output voltage waveform of a multilevel inverter, typically obtained from capacitor voltage sources, and the so-called "multilevel" starts from three levels [8].There are three main types of multilevel inverters: diode-clamped, capacitorclamped, and cascaded H-bridges [9].
If the DC supply voltage increased (adding more batteries in series to maintain the voltage or to decrease the current) for the larger power requirement, the inverter component must be able to withstand the maximum DC supply voltage.

II. OHESW Technique:
The Optimized Harmonic Elimination Stepped-Waveform (OHESW) technique is very suitable for a multilevel inverter circuit.By employing this technique along with the multilevel topology, the low Total Harmonic Distortion THD output waveform without any filter circuit is possible.Switching devices, in addition, turn on and off only one time per cycle, this can overcome the switching loss problem, as well as Electromagnetic Interference (EMI) problem.
In retrospect, multilevel inverters were actively used to improve the performance of motor drives and power systems.An evident feature of this topology is to reduce harmonic components.PWM control has been usually used to eliminate harmonics, but there are still many unwanted harmonics existing under PWM control [10].
Basically, the concept of the proposed technique is to combine the idea of the Selective Harmonic Elimination PWM (SHEPWM) presented by Patel et al [1] with the quarter-wave symmetric idea concept presented by Stefano Vic et al [11].
In this paper, the OHESW technique will be applied to improve the power quality of the cascade multilevel inverter drive.

III. Cascaded H-bridges Multilevel Inverter:
The cascaded H-bridges multilevel inverter is a relatively new inverter structure [9].It is proposed here to solve all the problems of the multilevel inverters as well as conventional multi pulse (or PWM) inverters.This new multilevel inverter eliminates the excessively large number of i) bulky transformers required by conventional multi pulse inverters, ii) clamping diodes required by multilevel diodeclamped inverters, and iii) flying capacitors required by multilevel flyingcapacitor inverters [5].
A cascaded H-bridges multilevel inverter is simply a series connection of multiple H-bridge inverters.Each Hbridge inverter has the same configuration as a typical single-phase full-bridge inverter [8].
The cascaded H-bridges multilevel inverter introduces the idea of using Separate DC Sources (SDCSs) to produce an AC voltage waveform.Each H-bridge inverter is connected to its own DC source V dc .By cascading the AC outputs of each H-bridge inverter, an AC voltage waveform is produced.Fig. 1 provides an illustration of a single-phase cascaded H-bridges multilevel inverter using 3-SDCSs.By closing the appropriate switches, each H-bridge inverter can produce three different voltages: +V dc , 0 and -V dc .
As mentioned earlier, each H-bridge inverter produces an AC voltage υ i , where i stands for one particular Hbridge inverter.Fig. 1

1495
voltage produced by the multilevel inverter, these three distinct AC voltages are added together.Fig. 2 provides an illustration of these ideas, when the Multilevel MFS scheme is used.It also illustrates the idea of "levels" in a cascaded H-bridges multilevel inverter.The smallest number of voltage levels for a multilevel inverter using cascaded inverter with SDCSs is three.To achieve a 3-level waveform, a single full-bridge inverter is employed.In Fig. 2, one notices that three distinct DC sources (s = 3, where s is the number of DC sources) can produce a maximum of (l = 7 distinct levels) in the output phase voltage of the multilevel inverter.More generally, a cascaded Hbridges multilevel inverter using s -SDCSs can produce a maximum of (2s + 1) distinct levels l in the output phase voltage [11].
The concept of cascade multilevel inverter with SDCSs is very interesting due to many reasons.This topology requires the least number of components, among all multilevel inverters, to achieve the same number of voltage levels.It is also possible to be modularized circuit layout and packaging because each level has the same structure, and there are no extra clamping diodes or voltage balancing capacitors [9].In addition, softswitching technique can be applied in this structure to avoid bulky and lossy resistor-capacitor-diode snubbers, as part of future work.

IV. Optimized Harmonic Elimination Switching Angles:
The OHESW is assumed to be the quarter-wave symmetric.Fourier series of the quarter-wave symmetric s Hbridge cell multilevel output waveform is written as follows: where α k is the optimized switching angles, which must satisfy the following condition: The method to solve the optimized harmonic switching angles will be explained in this Section.From Eq. 1, the harmonic components in the waveform can be described as follows: 1.The amplitude of DC component equals zero.

2.
The amplitude of all odd harmonic components including fundamental one, are given by:

3.
The amplitude of all even harmonics equal zero.Thus, only the odd harmonics in the quarter-wave symmetric multilevel waveform need to be eliminated.

1496
The switching angles of the waveform will be adjusted to get the lowest output voltage THD.

V. Solving of Harmonic Elimination Equations:
When the MFS scheme shown in Fig. 2 is implemented using s switching angles, Eq. 2 can be used to derive s different harmonic equations.In other words, s switching angles will be used to control the values of s different harmonics.Unfortunately, these harmonic equations are transcendental equations, making them difficult to solve without making use of some sort of numerical iterative technique, such as Newton-Raphson.Unfortunately, numerical iterative techniques have their drawbacks: 1.These techniques require an initial guess in order to work.However, if the initial guess is not good enough, a solution will not be found.2. They will only find one solution, if one exists.The obvious drawback here is that more than one solution might exist to the problem at hand.Until recently, numerical iterative techniques seemed to be the only viable method to solve the aforementioned nonlinear harmonic equations [1,2].However, this section will introduce Resultant theory.Using Resultant theory, all solutions (if they exist) to the nonlinear equations can be found without the need for an initial guess.However, by making some simple changes of variables and simplifying, these transcendental equations can be transformed into a set of polynomial equations.

A.
Transcendental Harmonic Equations: An example on application of Resultant theory will be given in this section by considering a cascaded Hbridges multilevel inverter using three equal DC sources.Eq. 2 gives the values of the odd sine harmonics corresponding to the MFS scheme with s switching angles.If three switching angles are used, it can be shown that the corresponding equation is: If one wants to control the peak value of the output voltage to be V 1 and eliminate the 3 rd and 5 th order harmonics, the resulting harmonic equations will be: One can also rewrite Eq. 4 as: where:

B. Solving the Harmonic Elimination Equations Using Resultant Theory:
For the transcendental harmonic Eqs. ( 5)- (7), consider the following changes of variables: 1497 Also, consider the following trigonometric identities [See Appendix A]:  9)-( 13) to the transcendental harmonic Eqs. ( 5)-( 7), one obtains the following polynomials: ( ) It should be noted that multilevel fundamental switching requires: where the units of the switching angles are radians.Therefore, the new variables x 1 , x 2 , and x 3 must satisfy: Eqs. ( 14)-( 16) are polynomial equations in the variables x 1 , x 2 , and x 3 .Resultant theory can now be used to solve polynomials p 1 , p 3 , and p 5 for the common roots of these three equations.

C. Solving the Polynomials Using Resultant Theory:
The polynomials p 1 , p 3 , and p 5 [Eqs.( 14)-( 16)] are functions of the variables x 1 , x 2 , and x 3 .Using p 1 to solve for x 1 in terms of the other two variables, one gets: Substituting this result into p 3 and p 5 , one gets: ) After x 1 has been trivially eliminated, one can now apply Resultant theory to eliminate x 2 .For the research presented in this paper, all Resultant calculations were found by using the Resultant command in the software package Mathematica [12].After factoring and then eliminating redundant factors and unnecessary numerical constants, the Resultant res(x 3 ) of the two polynomials in Eqs.20 and 21 was found to be as in the Appendix B. Since the polynomial res(x 3 ) is only a function of one variable, one can begin the process of finding the appropriate switching angles with the following steps: 1. Given the value for the parameter m, solve for the roots of res(x 3 ) = 0.

Keep
the roots for which , where Re refers to the real part of a possibly complex root.Denote these roots as {x 3k }.

3.
For each member of the set {x 3k }, substitute it into p 3 (x 2 ,x 3 ) and solve for the roots of p 3 (x 2 ,x 3k ) = 0. 4. Keep the roots for which: . Denote the set of remaining roots as {x 2l ,x 3l }. 5.For each member of the set {x 2l ,x 3l }, compute m-x 2l -x 3l to find x 1 values.6. Keep the roots for which: . Denote the set of remaining roots as {(x 1p, x 2p, x 3p )}.
9. If the result is less than some arbitrarily small tolerance level ε, the switching angles are given by: One should notice above that complex roots to the polynomial equations are being considered as candidates for switching angles.The reason is due to the fact that the imaginary part of the root may be small enough such that the real part of the root may still lead to a viable switching angle.
Eq. 22 gives an indication of the harmonic distortion due to the 3 rd and 5 th order harmonics.Theoretically, Eq. 22 should always be zero since one is supposed to be eliminating the 3 rd and 5 th order harmonics.However, it was just mentioned that complex roots might be considered where the imaginary part is infinitesimal small.Nevertheless, these complex roots will lead to a small but nonzero harmonic distortion.Also, numerical round off in the computation of the roots will lead to a small harmonic distortion.The values given by Eq. 22 can be controlled such that they are always below some arbitrarily small number ε.For the work presented in this paper, this tolerance level was set at 0.001 times the current value of m.

D. Minimization of the 3 rd and 5 th Harmonic Components:
For those values of m for which p 3 (x 1 ,x 2 ), p 5 (x 1 ,x 2 ) do not have common zeros satisfying 0 ≤ x 1 ≤ 1, 0 ≤ x 2 ≤ 1, the next best thing is to minimize the error: This was accomplished by simply computing the values of e( j∆x, k∆y) for j, k = 0,…, 1000 with ∆x = 0.001, ∆y = 0.001 and then choosing the minimum value.

VI. Design Procedure:
The criterion for the optimum multilevel inverter design is to minimize the harmonic content of the inverter output since this will reduce the filter size and result in a low cost, highperformance inverter.
Design of the cascade multilevel inverter by using OHESW technique was investigated in this section.A simulation program was written to calculate the optimized switching angles and analysis of the system performance.An experimental prototype system was constructed to operate as a cascade 7level inverter using power MOSFETs fed capacitor-run single-phase induction motor.

A. Software Implementation:
The object of this section is to design computer programs to assist the OHESW cascade multilevel inverter design calculation processes and consequently the time, cost, and efforts would be reduced in obtaining the acceptable optimum inverter design with high quality.Some of the results such as switching angles are important to obtain the optimum switching instants necessary for hardware operation.
The output of practical inverters contains harmonics and the quality of an inverter is normally evaluated.An evaluation criterion was measured by the THD: where V 1 is the fundamental voltage component and V n are the n th harmonic voltage components [13].Usually, n = 121 is reasonably accepted.The programs have been written in Mathematica and MATLAB languages.The computation steps have been done consisting, the following procedures: 1. Computation of the optimized switching angles α for each scheme.2. Computation of the harmonics amplitude of the output voltage by using Fourier series.

B. Hardware Implementation:
The aim is to build a 7-level cascade multilevel inverter in which the switching of the power switches is done by software.This will reduce the hardware requirements considerably.
Basic block diagram of the inverter system consisting of the user interface, switching pattern generation unit, driver circuit, power supply, power circuit, and the output unit is shown as in the Fig. 4. The heart of the hardware is the power circuit shown in Fig. 5, which consists of 3-H-bridge with three isolated 100V SDCSs.Each bridge is consisting of four N-channel Enhancement MOSFETs; IRF450, 500V, 13A.
The power switches are driven by a driver circuit, which will switch according to the switching signals generated by the switching signal generating unit.The switching signals which are generated by the Personal Computer (PC) are isolated by a buffer IC and the output from the buffer is fed to an opto isolator.The function of the opto isolator is to switch the external power supply given to the driver circuit appropriately in order to provide the required Gate to Source voltage of the MOSFET as shown in Fig. 6.

Fig. 6: Block Diagram of the Drive Circuit
Implementation of software control for the inverter brings few vital advantages for the user.One Important feature is that the hardware requirement is reduced to a great degree.Visual Basic has been used to design the software.

VII. Results and Discussion:
A. Simulation Results: The optimization technique has been used to minimize the harmonic content The solutions of switching angles α versus m for the MFS scheme are shown as in the Fig. 7.Note that not all the range of m has a solution, for example, in the case of 7-level OHESW scheme, there are solutions in the intervals: m∈ [ Fig. 8 shows the plot of the voltage THD with m for different values of inverter voltage levels l.It can be concluded from the figure that the increasing of l decreases THDmin [See Fig. 9] until the lowest one; THDmin=6.4554 is obtained at m=4.925 for 15-level inverter.Fig. 10 shows the instantaneous output voltage OHESW for both 7-and 15-level and with minimized THD.If the number of l is higher, a near-sinusoidal staircase voltage can be generated with only fundamental frequency switching.
The spectra at THDmin corresponding to the instantaneous output voltage waveforms in Fig. 10 are illustrated as in the Fig. 11 which shows two examples, one for 7-stepped waveform and the other for 15-stepped waveform.The first spectra show that the 3 rd and 5 th harmonics are eliminated.Therefore the 7 th (350Hz) harmonic will appear in the spectra as a first harmonic.The second spectra show that the 3 rd , 5 th … 13 th harmonics are eliminated.Therefore the 15 th (750Hz) harmonic will appear in the spectra as a first harmonic.It can be seen that increasing l, increases the eliminated harmonics.
The corresponding instantaneous line currents of motor fed by OHESW cascade multilevel inverter at THDmin are shown in Fig. 12.The ripple of current decreases with increasing l since increasing l (or K) causes eliminating more harmonics with lower orders, leaving harmonics with higher orders which increases the motor impedance with frequency (X=2πfL); therefore the harmonic currents decreases.So, the induction motor can be represented as a good low pass filter.As a result, the current waveforms become more sinusoidal with increasing l.
By using the voltage spectra and the equivalent circuit of the motor, the current spectra can be calculated as in the Fig. 13.
As shown in Fig. 7, for singlephase, 7-level MFS scheme with m∈[0 , 1.64], [2.08 , 2.4] and [2.46 , 3] there are no solutions that solve the Eq. 2. Consequently, for these ranges of m, the switching angles α were determined by minimizing the error e in the Eq.24.Fig. 14 shows a plot of the resulting e versus m for those value of m in singlephase, 3-DC source (s=3), 7-level inverter.This figure shows, when m=1.02, e is approximately zero, but it goes to zero at m = (1.65 -2.07) and m = (2.41 -2.45), because these values correspond to the boundary of the exact solutions of Eq. 2. However, note that e in the intervals [0 , 1.01], [1.03 , 1.64], and [2.46 , 3] is too large to make the corresponding α for these intervals of any use.

1502
Consequently, for m in these intervals, one must use some other approach (e.g., PWM) in order to get reduced harmonics.For the interval [2.08 , 2.4], e is around 7 % or less, so that it might be satisfactory to use the corresponding α for this interval to gate wider range; [1.65 , 2.45].

B. Experimental Results:
The proposed PC-based modulator and the cascade multilevel inverter system were used to produce additional experimental results.The proposed motor was used as a single-phase capacitor-run induction fan motor with 175W, 4 poles, and 1275 rpm.The motor parameters are listed in Table 1 in the Appendix C.
Figs. 15 and 16 illustrate the instantaneous output voltage and current respectively of the cascade 7-level inverter with m=2.44,V dc =100V, THDmin=11.6262%and optimized switching angles: (α 1 =8.76655 0 , α 2 =28.6886 0 , and α 3 =54.9395 0).The agreement between the simulated characteristics and those measured experimentally are satisfactory.VIII.Conclusions: a.The Chief Motivation of this work was based on finding an optimum design of single-phase multilevel inverter to be used in motor drives.b.The cascade multilevel inverter topology allows operation at a much higher voltage and power level than conventional PWM techniques.c.This work presented a procedure to selectively eliminate certain harmonics in a multilevel inverter utilizing MFS scheme.For a given m, this procedure will produce all solutions (if a solution exists) to the corresponding harmonic equations.In comparison, numerical techniques, such as Newton-Raphson, will produce only one solution.Furthermore, unlike numerical techniques, the procedure presented in this paper does not require an initial guess in order to find a solution.d.For a cascaded H-bridges multilevel inverter utilizing 7-equal DC sources, most of the time the switching angles which are necessary for hardware implementation can be selected such that the output voltage THD is less than 6.4554% when each power switch is switching one time per cycle for singlephase cascade multilevel inverter, which can meet the 5% of IEEE standard for three-phase multilevel inverter without any filter circuits.Therefore the waveform under OHESW control is apparently closer to a sinusoidal waveform, less harmonic content, less switching losses, reduced voltage stress on each power device, as a result, higher power quality and higher efficiency.e.In OHESW, not only the voltage THD decrease, but also the lowest existing harmonics is shifted to higher frequency.Thus, size of a filter circuit applied in OHESW inverter can be decreased dramatically.

Fig. 2 :
Fig. 2: Output Voltage of Cascaded H-bridges 7level Inverter Applying the results given in Eqs. (

4 . 5 .
, by finding the THD value for each value of m.Description of the proposed singlephase induction motor to be fed from the inverter.Eng.& Tech., Vol.26, No.12 , 2008 Optimum Design of Single-Phase Cascade Multilevel Inverter Using OHESW Technique 1500 Calculations of instantaneous values of voltages and currents.

Fig. 4 :Fig. 5 :
Fig. 4: Basic Block Diagram of the PC-controlled Inverter Tech., Vol.26, No.12 , 2008 Optimum Design of Single-Phase Cascade Multilevel Inverter Using OHESW Technique 1501 of the inverter output voltage.The best compromise between efficiency and quality of the inverter operation is achieved by the optimal switching pattern technique.The OHESW is given for l = 5 -15, to eliminate: (1 -6) harmonics.