Authors

Abstract

This paper presents the design procedure and implementation results of a
proposed software defined radio (SDR) using Altera Cyclone II family board. The
implementation uses Matlab/SimulinkTM, Embedded MatlabTM blocks, and Cyclone II
development and educational board. The design is first implemented in
Matlab/SimulinkTM environment. It is then converted to VHDL level using Simulink
HDL coder. The design is synthesized and fitted with Quartus II 9.0 Web Edition®
software, and downloaded to Altera Cyclone II board. The results show that it is easy
to develop and understand the implementation of SDR using programmable logic
tools. The paper also presents an efficient design flow of the procedure followed to
obtain VHDL netlists that can be downloaded to FPGA boards

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