The design of programmable multi-mode digital modulator for software defined radio (SDR) technology using FPGA is developed and investigated in this paper. The system generator from Xilinx and MATLAB tools are used for FPGA design as well as the implementation of the modulator over a Virtex-4 FPGA board. The HDL language on Xilinx ISE is used to generate the bit stream of the modulator algorithms into ADC/DAC device and FPGA board. The modulated signal obtained from MATLAB simulation is evaluated with the tested signal to verify the system functionality. Lastly, the optimally synthesized netlist of the integrated design is downloaded into Xilinx Virtex-4 FPGA MB development board. The verification of DAC output signal via oscilloscope demonstrate the empirical real-time signals similar to the simulated waveforms. Results shows the successfully implementation steps as timing constraint of FPGA is accepted without error. The proposed design is promising to enhance the current and next generation of communication systems with less power consumption compared with conventional design in term of FPGA Slices and Look Up Tables (LUTs) during the implementation process. The improvement in Slices and LUTs produce by ISE project utilization summary is 65% and 79% respectively.