A 2.4 GHz Differential Class-E Power Amplifier with on-Chip Transformers for Bluetooth Systems

: This work presents the design and simulation of a differential class-E Power Amplifier (PA) for class-1 Bluetooth systems in 0.13 μ m RF CMOS technology. The proposed PA can deliver 21.57 dBm output power to a 50 Ω load at 2.4 GHz with 65.59 % Power-Added-Efficiency (PAE) from 1 V supply voltage. In order to achieve fully integrated PA, on-chip balun transformers are designed and improved for converting single-ended input signal to differential signal in the input side and differential signal to single-ended output signal in the output side. The results are obtained using microwave office 2009 (version 9.00).


INTRODUCTION
he Bluetooth is recognized as an industry standard for short-range data and voice transfer to link mobile phones, laptops, digital cameras, and other portable devices [1].It is considered to be a high speed, low cost wireless technology, working with a radio frequency band (called the industrial, scientific, and medical bandor (ISM) for the short) between 2.4-2.48GHz.This frequency band is free for anyone to use, for any purpose (unlicensed) [2].For Bluetooth applications, there are basically three classes based on the transmission distance (100, 10, and 1-meter range), they are Class 1 (The transmitted output power Today, wireless applications like Bluetooth, WLAN etc. are rapidly growing and there is the need for low cost and high efficiency power amplifier [4].The design of an on-chip front-end power amplifier with high power efficiency in the mainstream Complementary Metal-Oxide-Semiconductor (CMOS) technology is a challenging problem [5].The difficulty of CMOS power amplifier lies in the design, including the low breakdown voltage of active devices and low supply voltage.So far, the differential topology has been widely considered as the one of the best solution, and it features a virtual ground, which can cancel the even harmonics.Besides, it will reduce the disturbance to other blocks in the transceiver when it is fully integrated in the system [6].
Since the modulation scheme employed by Bluetooth is Gaussian Frequency Shift Keying (GFSK), which is a constant envelope modulation scheme, a switching-mode (non-linear) PA can be used to achieve high efficiency.Among all classes of nonlinear power amplifiers, the class-E power amplifier is better choice in terms of circuit simplicity and high efficiency and this class has good performance at higher frequency [7].Murad et al., 2010 [8] presented a 2.4 GHz CMOS single-ended PA for wireless applications in TSMC 0.18 µm CMOS technology.All circuit components, except the output matching network, have been designed on chip.The power amplifier delivered an output power of 19.2 dBm with a PAE of 27.8 % from 3.3 V power supply.Meshkinet al., 2010 [7] designed a switch-mode CMOS class-E power controllable PA suitable for modern wireless communications in TSMC 0.18 µm CMOS process.The designed PA can deliver 21.09 dBm output power to 50 Ω load at 2.4 GHz with 57 % PAE from 1.8 V supply voltage and the output power can be controlled in 1 dBm steps with small drop in efficiency.Chen et al., 2011 [3] described the design of the two stage of class-E power amplifier for class 1 Bluetooth applications in 0.18 μm CMOS technology with load mismatch protection and power control features.Power control was realized by means of "open loop" techniques to regulate the power supply voltage.Post-layout simulation a 25.1 dBm output power and 54.2 % PAE were achieved at a nominal 1.8 V supply voltage.Raza and Jonas, 2013 [9]presented a novel approach of implementing parallel circuit differential class-E amplifier.A test circuit is implemented in 0.13 µm CMOS process.The power amplifier achieves 22 dBm output power at 2.4 GHz from a 2.5 V with an overall PAE of 38 %.
The outline of this paper is as follows.In section 2, the design of a differential class-E PA for class1 Bluetooth application with two ideal transformers is described.In section 3, the design of on-chip transformers is demonstrated.The simulation results are presented in section 4. Finally, in section 5, conclusions are given.

DESIGN OF A DIFFERENTIAL CLASS-E PA WITH TWO IDEAL TRANSFORMERS
The design starts with the single-ended class-E PA followed by the differential configuration with two ideal transformers as following: The circuit topology (basic circuit) of a class-E power amplifier is shown in Figure (1) [10].In this circuit L 1 represents the drain bias RF choke, V dd is the drain supply voltage, C s is the capacitor shunting the active device (Q 1 ), L s is the class inductance, L os and C os constitute a series resonant circuit tuned at the operating frequency, L x is the excess (resultant) inductance and R s is the optimum resistance seen by the load network for the required output power.The active device, Q 1 , (MOSFET in this case) operates as an ON/OFF switch.

Figure (1): Typical class-E power amplifier with shunt capacitance configuration.
The component values of the circuit in Figure 1 are calculated at output power P out = 50 mw (17 dBm), operating frequency f o = 2.4 GHz, loaded quality factorQ Ls = 10 and drain supply voltage = 1 V using the following equations [10]: where The value of L 1 can be calculated by the resonant equation of an LC tank as follow: where C 1 : the cancelation capacitance by the inductor, C p : exact shunt capacitance at the drain of the transistor, and C s : capacitance of the class.In order to match a 50 Ω load, an up-conversion matching network is implemented to transform an optimum load to a 50 Ω load.L-matching network is chosen because of its circuit simplicity.Also, the excess inductance (L x ) in a class-E power amplifier can be combined with the inductor used in the matching network if a low-pass L matching network is used.Therefore, the schematic of a class-E power amplifier is modified as shown in Figure (2).
The values of L m , C m and L total can be calculated using the following equations [11]: …( 6) Using Equation (1) to Equation ( 7), the calculated component values for singleended class-E power amplifier are summarized in Table (1

Table (1): Component values of the single-ended class-E PA.
The final step in the design is combining of two single-ended topology to produce differential topology and then using two ideal transformers, the first one in the input side is to convert single ended input signal to differential signal and the second in the output side is to convert the differential signal to single-ended 50 Ω load signal as shown in Figure (3).The additional objective of using ideal transformers is obtaining the primary results.

DESIGN OF ON-CHIP TRANSFORMERS
On-chip transformers contribute substantially in enhancing reliability, efficiency, and performance of silicon-integrated Radio-Frequency (RF) circuits.Many researchers have reported the integration of on-chip transformers in PAs [12].In order to design on-chip transformers instead of the ideal transformers, which used with the proposed class-E PA of Figure 3, the inductance required for each winding of the transformer must be determined from consideration of the terminal impedances and center frequency specification.As a first step, L-section matching network that employed in the proposed design is converted to parallel section matching network as shown in Figure 4.In these networks L 1 represents the inductance of the primary winding, R p is the parallel (differential) resistance, R L is the output resistance, which is typically 50 Ω, R opt is the optimum resistance seen by the load network of the class-E PA and C 1 locates in parallel to the inductance.This conversion process is achieved using the following equations [13]: According to the on-chip (1:1) square transformer, the value of the inductance for secondary winding can be calculated from: In the proposed PA, the component values of the parallel matching network are calculated using Equation (8) to Equation (12), at load resistance R L = 50 Ω, operating frequency f o = 2.4 GHz, turn ratio n = 1, and the optimum resistanceR opt = 16.6 Ω.The calculated values are summarized in Table (2).

Table (2): Component values of the Parallel matching network.
The design of an on-chip transformer is dependent on the available process.Nonetheless, good efficiency of the transformer can be obtained by increasing the magnetic coupling factor (k) and improving the quality factor (Q) of the coupled inductors, that is; minimizing of the minimum insertion losses (IL min ).In order to improve coupling factor, the wide metal traces of the transformer can be split into multiple parallel segments and interleaved [14].
In the next step of the design, the dimensions of the transformer (outer dimension (D out ), width of primary and secondary traces (W p , W s )) are adjusted until the inductances for primary and secondary winding approaching to the values which calculated from matching network in Table (2).Virtually, for 1:1 square transformer with geometrical parameters that are illustrated in Table (3), the onchip balun transformer (a device which converts a single ended (unbalanced) signal to a differential (balanced) signal and vice versa) is designed and optimized using the following design equations [14]: and The primary and the secondary inductances can becalculated in terms of R 1 and R 2 , Q 1 and Q 2 for primary and secondary respectively, i.e.
In this design, a standard 0.13 µm CMOS process with two aluminum metal layers is used.This process provides the top metal of 3 µm thickness and the dielectric thickness of 4 µm.Figure 5 shows the Electro-Magnetic Sight (EMSight) setup for on-chip balun transformer.To reduce the size of the on-chip balun transformer (area-efficient), the primary and secondary coils of this transformer are turned into two windings instead of one winding.In addition, to minimize the losses (heat) that is generated due to the orthogonal edge at each corner of the primary and secondary traces of the transformer; the orthogonal edge is converted to lapped edge.Figure 6 shows the on-chip balun transformer design after improvement.

SIMULATION RESULTS
The proposed power amplifier is designed and simulated using microwave office 2009(version 9.00) [15], with all the devices optimized to achieve the required Bluetooth performance.Figure (7) shows the simulated output power, power gain, and power-added-efficiency versus input power at a frequency of 2.4 GHz.The PA provides 21.57dBm of output power with a maximum gain of 16.57dB and a PAE of 65.59% for an input power of 5 dBm as shown in Figure ( 7) The simulated performance of the PA as a function of frequency for an input power of 5 dBm is presented in Figure (8).As shown from this figure, the gain of the prototype PA remains almost flat over the class-1 Bluetooth band, which is from 2.4 GHz to 2.48 GHz.The minimum PAE is 65.59% while the output power is above 21.39 dBm for the entire class-1 Bluetooth band, thereby, fulfilling the 20-dBm output power requirement.In order to estimate the linearity of the proposed PA, the compression characteristics are plotted in Figure (9).As shown from this figure, the power amplifier reaches its output 1dB compression at 20.78 dBm, with an input power level of 2.9 dBm.The BSIM3v3.3 model [16] for MOSFET transistor is used in the power amplifier simulation.Finally, to verify the feasibility of the segmentation idea in the balun transformer performance improvement, a square transformer with segmentations is simulated using EMSight simulator.EMSight simulator is an electro-magnetic solver provided with Microwave Office (MWO) 2009 RF/Microwave software tools.The geometrical parameters for balun transformer and the simulation results are summarized, previously,AS in Table (3).
Table (4) shows the geometrical parameters and the simulation results for the improvement balun transformer.A comparison between the results in Table (3) and Table (4) show that the values of L p , L s , Q p , Q s , k, and IL min are remained approximately the same, with reduction in the area required for implementing the transformer.

Table (4): Geometrical parameters and simulation results for
on-chip improvement balun transformer.

CONCLUSIONS:
The design and simulation of a power amplifier for class-1 Bluetooth system in 0.13μm CMOS technology is presented.By using differential topology with two ideal transformers, P o1dB of 20.78 dBm can be achieved at 2.9 dBm input power.The proposed power amplifier can deliver 21.57dBm output power to a 50 Ω load at 2.4 GHz with 65.59 % power-added-efficiency (PAE) and 16.57dB from 1V Finally, all the results are obtained from the simulation, and there is the need for fabricating this proposed design to verify the results, practically, presented in this work.
Figure (3): The proposed differential class-E power amplifier with two ideal transformers.

22 Eng. & Tech. Journal ,Vol.32, Part (A), No.7, 2014 A 2.4 GHz Differential Class-E Power Amplifier with on-Chip Transformers for Bluetooth Systems supply
. The designed on-chip balun transformer used in this work plays two roles: First, it is used to transform the 50 Ω load.Second, it converts a differential signal into single-ended signal so that it can be connected to the antenna directly, and it converts a single-ended signal to differential signal in the input side.The characteristics of the PA, accompanied by those of the other Bluetooth PAs, are summarized in Table5.As a comparison with other listed CMOS PAs for Bluetooth applications, this amplifier has the highest power-added-efficiency, lowest supply voltage, good output power, medial linearity, and no external components are required.